STLD V-VIII IMPORTANT QUESTIONS

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STLD III & IV UNITS IMP QUESTIONS

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STLD I & II Questions

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S&S Imp Questions

S&S MID IMPORTANT QUESTIONS

II ECE

Unit-I

1. a) Define and Sketch the

i) Impulse ii) exponential iii) Step function iv) Signum function

b) Express the Impulse function in terms of step function and explain

2. a) Explain

i) How signum function is expressed in terms of unit step function

ii) How Step function is expressed in terms of Impulse

. b) Prove the following signals are periodic and their fundamental period is

3. a) Determine whether the following signals are energy signals, power signals or

neither.

4. a) Determine whether each of the following sequences are periodic or not. If

Periodic determine the fundamental period.

i) x₁(t) = sin (6Пn/7) ii) x₂(t) = sin (n/8) iii) x₃(t) = 2sin (Пn/10)

b) Explain the concept of Sinc function.

Unit-II

1. Discuss the concept of Trigonometric Fourier series and derive the expressions for coefficients.

2. a) Derive the relations between exponential and trigonometric Fourier series

coefficients

b) Explain the symmetry of waveform and comment on Fourier co-efficient

3. a) State strong and weak Drichlet’s conditions.

b) Find the Fourier series expansion of the half wave rectified sine wave shown

below

4. a) Find the exponential Fourier series for the periodic waveform shown below and draw its spectrum.

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STLD I MID IMPORTANT QUESTIONS

STLD  I MID IMPORTANT QUESTIONS

II ECE-A

1. a) Represent the decimal number 7258 in

            i) BCD code    ii) excess-3 code        iii)2421 code    iv) 6311 code

    b) What is a self complementary code? Explain with two examples.

2. a) Perform the following operations using 2’s complement arithmetic:

            i) (+43)10 − (−53)10.              ii) (3E91)16 − (1F93)16

    b) Represent the unsigned decimal numbers 351 and 986 in BCD, and then show the 

         steps necessary to form their sum.

3. a) Explain different methods used to represent negative numbers in binary system.

    b) In a new number system X and Y are successive digits such that (XY)r = (25)10 and

         (YX)r = (31)10 . Find X,Y,r

4. a) What do you understand by canonical and expanded forms of Boolean expressions?

        Illustrate with examples.

    b) Design a logic circuit having three inputs A, B, C such that output is 1 when A = 0 or

        whenever B = C = 1. Also obtain logic circuit using NAND gates.

5. a) It is proposed to construct an eight-input NAND gate using only two-input AND gates

        and two-input NAND gates. Draw the logic arrangement that uses the minimum   

        number of logic gates.

    b) What is a parity bit? Define even and odd parity. What is the limitation of the parity  

         code when it comes to detection and correction of bit errors?

6. a) Explain error correction and error detection codes with examples.

    b) Implement the following Boolean function F using the two-level form

         i) NAND-AND ii) AND-NOR where F (A,B,C,D) =∑(0,1,2,3,4,8,9,12)

7. a) Explain the fundamental postulates of Boolean algebra

    b) Obtain the compliment and dual for the following expressions

        i) AB + BC + AC  ii) A+B’C(A+B+C’)                  iii) AB+(AC)’+(AB+C)

8. Minimize the following function using tabular minimization and verify the same with

     K-map minimization F=π(0,2,4,5,6,7,8,10,14,17,18,21,29,31) . πd(11,20,22)

9. a) Write a simplified max-term Boolean expression for  π (0, 4, 5, 6, 7, 10, 14) using the

        Karnaugh mapping method.

    b) Minimizing a given Boolean expression using the Quine–McCluskey tabular method  

        yields the following prime implicants: −0−0, −1−1, 1−10 and 0−00. Draw the  

        corresponding Karnaugh map.

10.a) Write both sum-of-products and product-of-sums Boolean expressions for

        i) a two-input AND gate,    ii) a two-input NAND-gate,    iii) a two-input EX-OR gate and

        iv) a two-input NOR gate from their respective truth tables.

     b) Write the procedure of design of Combinational Circuits.

  

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II-I 2nd MID DLD& EDC Important Questions

II-I CSE-A II MID DLD IMP Questions

1.  a) Implement the following Boolean function using 4× 1 multiplexer.

          F(A,B,C,D) = ∑m(2,5,8,9,10,14,15)

     b) Construct 4 to 16 line decoder with five 2-to-4 line decoders with enable
         input. Draw and explain the relevant logic diagram.                                         

2.      a) Using PLA logic, implement a BCD to excess-3 code converter. Draw and 

    explain its truth table and logic diagram.

     b) Construct 128×8 ROM using 32×8 ROM chips. Draw and explain the relevant 

         logic diagram.                                                                                                     

3.  a) Realize D-FF and T-FF using JK-FF. Draw the logic diagrams with their truth tables.

     b) Deduce the design procedure for sequential logic circuits

                       

4.  a) Design, draw and explain the 4-bit universal shift register.

     b) Design, draw and explain a 4-bit ring counter using D- flip flops with

          relevant timing diagrams.                                                

5.  a) Implement the following Boolean function using8× 1 multiplexer.

          F(A,B,C,D) = _m(2,5,8,9,10,14,15)

     b) Construct 4 to 16 line decoder with five 2-to-4 line decoders with enable
          input. Draw and explain the relevant logic diagram.

6.  a) A ROM chip of 4,096 × 8 bits has two chip select inputs and operates from a

         5-volt power supply. How many pins are needed for the integrated circuit  

         package? Draw and explain the block diagram of this ROM.

     b) For 3-input, 4-output truth table of a combination logic circuit, derive the PAL 

         programming table and draw the relevant logic diagram.

XYZ	ABCD
000 001 010 011 100 101 110 111	0100 1111 1011 0101 1010 0001 1110 0111

7. A sequential circuit with two D flip flops A and B, two inputs x and y and one 

    output z is specified by the following next state and output equations.

    i) A(t+1)= x’y xA       ii) B(t+1)= x’B xA        iii) Z=B

    a) Draw the logic diagram. b) List the state table for the sequential circuit.

    c) Draw the state diagram.

8.  a) Design, draw and explain a modulo -12 up synchronous counter using T- 

         flip flops.

     b) Draw and explain the logic diagram for a 4-bit binary ripple down counter

         using positive edge triggered flip-flops.

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